CorePeripherals: Target Tree Structure#939
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thorstendb-ARM wants to merge 6 commits into
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jreineckearm
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May 7, 2026
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Let's have a look at this together when I am back (please set up a meeting for that so we don't stall forever).
Index file changes look good. I don't think we should change to showing multiple CPUs at a time. This breaks with the standard VS Code patter of debug connection contexts, i.e. only show the view of one CPU at a time based on the session selection while multiple sessions (connections).
I know the Peripheral Inspector does that differently but mainly because that change was pushed through without considering the rest. I expect something to change here when we redesign it in future (some users complained about that being hard to navigate, especially for multi-core).
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Hierarchical Core Peripherals
This PR introduces hierarchical grouping for the Core Peripherals tree view. Core peripherals like SysTick and NVIC can exist in multiple variants (Secure/Non-Secure with TrustZone, or per-core in multi-core systems). Instead of a flat list, the tree now supports up to three grouping levels:
Single-core without TrustZone — flat list (no change)
Single-core with TrustZone — peripheral → Secure / Non-Secure
Multi-core — core → peripheral → (optional S/NS variants)
For the full design document, see hierarchical-core-peripherals.md.
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#239
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